They're all somewhat MIPS-like, and that's mostly due to their heritage and the relative ease of creating them. What's more, they all seem to have similar (not so great) performance characteristics. Currently the only "RISC" ISA that has good performance/efficiency characteristics is the ARM, and that one has some very un-MIPS-like predicated instructions, combined shifts, and more complex addressing modes (including post-inc/decrement.)
Meanwhile, what AMD and Intel have done with x86 both in terms of performance and efficiency has been quite amazing, so I think what would be interesting to see is an OpenCISC/x86 that draws some inspiration from them, or at least something more ambitious and imaginative than yet-another-MIPS-clone. Otherwise, seeing all these projects attempting to revive the RISC fad, which is long over, feels rather misguided.
They're all somewhat MIPS-like, and that's mostly due to their heritage and the relative ease of creating them. What's more, they all seem to have similar (not so great) performance characteristics. Currently the only "RISC" ISA that has good performance/efficiency characteristics is the ARM, and that one has some very un-MIPS-like predicated instructions, combined shifts, and more complex addressing modes (including post-inc/decrement.)
Meanwhile, what AMD and Intel have done with x86 both in terms of performance and efficiency has been quite amazing, so I think what would be interesting to see is an OpenCISC/x86 that draws some inspiration from them, or at least something more ambitious and imaginative than yet-another-MIPS-clone. Otherwise, seeing all these projects attempting to revive the RISC fad, which is long over, feels rather misguided.