Since a few people on this thread are talking about wanting to do board design without prior EE experience I decided to top-post this rather than post individual replies.
This has come-up on HN a few times. As an EE with plenty of experience designing all manner of hardware I'll tell you that, while not impossible, there's quite a road to travel from having no formal training in electronics to designing and laying out reliable working boards. Not to say it can't be done. Anyone with enough drive and motivation these days can learn almost anything with the myriad of resources out there. Possible? Yes. Plausible? Only for the really driven.
There's a demarcation line somewhere in the 25 to 50 MHz range beyond which the design of digital electronics isn't very tolerant of amateur design practices. You really start to need a solid understanding of the underlying science. Unlike software development, it is frustrating and expensive to blindly poke around mid to high speed design in hopes of finding a solution.
Digital circuits in many ways become very analog as frequency increases and clock edges get sharper. They can and do radiate RF and they can and do bounce around the copper traces mucking things up if either the electrical design or the trace layout and board stack-upare off.
Something as seemingly "simple" (in quotes because it isn't simple) as implementing a DDR2 or DDR3 memory interface requires quite a range of information in your mental design database.
For example, you need to start to consider the time it takes for signals to leave the FPGA (travelling at nearly the speed of light) and arrive at the chip. These signals must arrive within a very precise window of acceptance. A window which is measured in nanoseconds. You need to model the signal path from the die through the interconnect, BGA ball, land and via stack, trace and then back up the chain into the memory chip. And you need to do this for every single connection.
While you do the above you also need to look after the integrity of the signals themselves. In fact there's a discipline called "Signal Integrity" (SI) that deals with this. Most large companies have dedicated Signal Integrity engineers. The field is somewhat complex and requires a good deal of experience and study, particularly for mass production. Anyhow, at higher speeds everything is a transmission line. Failing to design with this in mind pretty much guarantees that a circuit that looks absolutely perfect on paper will not work.
SI has a close cousin called "Power Integrity". As operating frequencies increase and signal edges become sharper the power distribution system (PDS) becomes very critical. Once again, not understanding the subject can result on a board that looks great but does not work, or worst, is hopelessly unreliable. PDS design issues can cause resonance and oscillations on the power planes, increase clock jitter, destroy signal integrity and timing and more. This too is a subject that is usually the domain of specialists in larger organizations.
SI and PDS design alone can mean that you can have a schematic that looks absolutely perfect and a circuit board that does not work, is unreliable or has a "personality" such as weird things happening, random resets and other hair-pulling afflictions. SI and PDS design knowledge is of paramount importance as design operating frequencies rise.
That's not the end of it. Digital design with FPGA's also needs to consider such topics as the number of average simultaneous outputs switching per side/bank on the device. This has both SI and PDS implications.
As you approach the GHz range things get even more interesting. Examples of this might be doing HDMI or DVI transmitter/receiver designs or Thunderbolt/PCIe interconnects. Now you are solidly in RF territory, a land with it's own set of voodoo to learn.
As I said above, I draw this imaginary demarcation line somewhere in the 25 to 50 MHz range. Below this line one can hack around and build stuff that works well or reasonably well most of the time. I'll generalize and say that's the Arduino and below territory, the hobby embedded territory. Nothing too critical. Timing windows are comfortable. SI issues are relatively minimal. SSO is mostly not of concern. Transmission line or impedance controlled design is rarely needed, etc.
The minute you start talking about something like a laptop board or high performance FPGA based, well, anything, you enter a domain that is either reserved for very experienced EE's or requires a ton of time and dedication to master as a non-EE. This is also a domain where hobbyist tools tend to fail miserably. I use Altium Designer for electronic design along with FEA tools for SI and PDS designs on high speed boars. I also use a number of custom software tools created over time in order to simplify and facilitate the process. Most companies or designers develop guidelines, rules, tools and procedures over the years in order to improve design yields. Like I said, a perfect schematic does not directly equate to a working board.
I haven't even covered topics such as thermal design and regulatory testing. That's a whole other layer of knowledge that is critical to have depending on what you are doing.
Making hardware is very different from writing software in that the iterations per unit time are both slower and very costly. You can sit in front of your computer and hack for hours and hours, fail, edit, compile, learn and it costs nothing. Not so with hardware. You really can't learn that way. Even if you had money to burn, at one point you really need to understand the science behind it all in order to not burn cubic time learning by trial and error.
Even freshly graduated EE's are not necessarily qualified to successfully approach high-speed design. It takes years of learning and dedication beyond school to really master the art. This is not a matter of software. Even if I gave you a license to $100K worth of EE design software (yes, it can get that expensive) and fully trained you on it's use you would not be prepared to design high speed boards with it.
Again, none of this is to say this is an impossible domain for non-EE's to approach. Just pointing out that it is an iceberg. What you see is what's visible above the surface.
Where to start? College Physics and Calculus. Basic Electronics. Transistors. AC, DC and RF Circuit theory. Buy kits and breadboard-based trainers and build circuits. Make lots of boards. Learn. Look at the set of courses required for an EE degree and learn as much of that as you can (and in the order they are presented). Reading books about signal integrity right now without the required foundation isn't a good idea. It's like trying to read a Chinese book on Chinese literature without having learned the Chinese language first.
A thousand times yes. Set your expectations accordingly and then go for it. I've compared laying out a high speed board to the equivalent of pulling out the Linux scheduler, rewriting it to use an atomic clock for systick and re-inserting it into the kernel such that every distro still works :-) That said, the really cool thing about "System on Chip" or SOC devices (like the one in Raspberry Pi or on the BeagleBone) are that most of the hairy high speed stuff is inside the chip and you're only worried about the low speed external stuff. That is much more doable.
I started laying out a "small" Zyng board and running though the DDR3 timing calculations for each signal line was insanely complex. I was like "seriously?" It explained board layouts where the memory traces are all made the exact same length even if that wastes board space.
That said, if you're interested in pursuing this and are willing to spend some time taking online training and building a number of exemplar circuits to test out your understanding.
Start at 10Mhz and work your way forward to 200Mhz.
This guy hits all the design concern bullets I can think of, and he writes well. Listen to him.
Also, get some PCB quotes before you try to jump feet-first into learning high-speed design via rapid prototyping. The cheapest boards I've ever ordered were 2 for $80; the last board I made with even the slightest eye to density/PDS/SI I think was 4 for $500. That was a dinky 2"x2" or 3"x3" 4-layer board too, none of the crazy 24 or 32 layers that laptops have.
Where are you getting your boards fabbed? I literally just got back 3 2x3" 4-layer boards with 5mil min trace/spacing from OSH Park for a total of $54 (shipping included).
OSH Park does pooled PCB orders; didn't have time to wait for an order to get together. You can definitely save money if you don't mind waiting up to a month for your board. Although, perhaps as pooled orders have grown in popularity, the delay isn't as bad these days?
They do two 4-layer batches a month, so yeah, the turn around can be nearly a month if your design is ready on, say, the 3rd of the month. I think the do 2-layer board runs every other day now.
This is pretty much what I've gathered from a friend that works with custom wifi stuff[1] (eg: real-time positioning based on wifi, with a custom reciever chip). They do some mil-spec communication stuff too.
What I really like though, is the trend that the rasberry pi is part of (and other boards/SoCs before it) -- it would be awesome to get some reasonably cheap completely open designs - both boards with I/O ram and something like a few tested FPGA with something like the LEON[2] "cpu".
I'm not sure how feasible it is -- and I'm sure it would be great for learning and experimentation. Not everything needs to be high speed -- the Amiga could do a lot of cozy graphics and audio, and snappy GUI -- all with a 7.5 Mhz cpu. There should be some room to play in the now "ancient"/"slow" space...?
Basically I'd love to see some mini/nano-ITX like boards, with passively cooled FPGA, with BIOS/init via coreboot running various open OSs. The rasberry pi ticks a lot of these slots of course, but it still has a few proprietary parts in there (then again, it is dirt cheap too).
The main thing I see missing, is something that is accessible from the ground up (maybe something even slower, along the lines of the C64/VIC20 might be even better).
As a programmer who's had to go through a lot of the learning processes you describe, and I can't agree strongly enough with your informative cautions on the challenges in PCB design, some here might be interested in this document that is merely an indicator of some of the challenges you mention.
Great response! I would like to suggest that as people choose to go down this path (and if it interests you - do it succeeding at challenging things is rewarding), a great way to contribute to the world of "open *" is to codify your lessons into better amateur tools. One of the problems robomartin lists is the lacking quality in amateur tools - and the obvious solution is to increase the quality of them!
This has come-up on HN a few times. As an EE with plenty of experience designing all manner of hardware I'll tell you that, while not impossible, there's quite a road to travel from having no formal training in electronics to designing and laying out reliable working boards. Not to say it can't be done. Anyone with enough drive and motivation these days can learn almost anything with the myriad of resources out there. Possible? Yes. Plausible? Only for the really driven.
There's a demarcation line somewhere in the 25 to 50 MHz range beyond which the design of digital electronics isn't very tolerant of amateur design practices. You really start to need a solid understanding of the underlying science. Unlike software development, it is frustrating and expensive to blindly poke around mid to high speed design in hopes of finding a solution.
Digital circuits in many ways become very analog as frequency increases and clock edges get sharper. They can and do radiate RF and they can and do bounce around the copper traces mucking things up if either the electrical design or the trace layout and board stack-upare off.
Something as seemingly "simple" (in quotes because it isn't simple) as implementing a DDR2 or DDR3 memory interface requires quite a range of information in your mental design database.
For example, you need to start to consider the time it takes for signals to leave the FPGA (travelling at nearly the speed of light) and arrive at the chip. These signals must arrive within a very precise window of acceptance. A window which is measured in nanoseconds. You need to model the signal path from the die through the interconnect, BGA ball, land and via stack, trace and then back up the chain into the memory chip. And you need to do this for every single connection.
While you do the above you also need to look after the integrity of the signals themselves. In fact there's a discipline called "Signal Integrity" (SI) that deals with this. Most large companies have dedicated Signal Integrity engineers. The field is somewhat complex and requires a good deal of experience and study, particularly for mass production. Anyhow, at higher speeds everything is a transmission line. Failing to design with this in mind pretty much guarantees that a circuit that looks absolutely perfect on paper will not work.
SI has a close cousin called "Power Integrity". As operating frequencies increase and signal edges become sharper the power distribution system (PDS) becomes very critical. Once again, not understanding the subject can result on a board that looks great but does not work, or worst, is hopelessly unreliable. PDS design issues can cause resonance and oscillations on the power planes, increase clock jitter, destroy signal integrity and timing and more. This too is a subject that is usually the domain of specialists in larger organizations.
SI and PDS design alone can mean that you can have a schematic that looks absolutely perfect and a circuit board that does not work, is unreliable or has a "personality" such as weird things happening, random resets and other hair-pulling afflictions. SI and PDS design knowledge is of paramount importance as design operating frequencies rise.
That's not the end of it. Digital design with FPGA's also needs to consider such topics as the number of average simultaneous outputs switching per side/bank on the device. This has both SI and PDS implications.
As you approach the GHz range things get even more interesting. Examples of this might be doing HDMI or DVI transmitter/receiver designs or Thunderbolt/PCIe interconnects. Now you are solidly in RF territory, a land with it's own set of voodoo to learn.
As I said above, I draw this imaginary demarcation line somewhere in the 25 to 50 MHz range. Below this line one can hack around and build stuff that works well or reasonably well most of the time. I'll generalize and say that's the Arduino and below territory, the hobby embedded territory. Nothing too critical. Timing windows are comfortable. SI issues are relatively minimal. SSO is mostly not of concern. Transmission line or impedance controlled design is rarely needed, etc.
The minute you start talking about something like a laptop board or high performance FPGA based, well, anything, you enter a domain that is either reserved for very experienced EE's or requires a ton of time and dedication to master as a non-EE. This is also a domain where hobbyist tools tend to fail miserably. I use Altium Designer for electronic design along with FEA tools for SI and PDS designs on high speed boars. I also use a number of custom software tools created over time in order to simplify and facilitate the process. Most companies or designers develop guidelines, rules, tools and procedures over the years in order to improve design yields. Like I said, a perfect schematic does not directly equate to a working board.
I haven't even covered topics such as thermal design and regulatory testing. That's a whole other layer of knowledge that is critical to have depending on what you are doing.
Making hardware is very different from writing software in that the iterations per unit time are both slower and very costly. You can sit in front of your computer and hack for hours and hours, fail, edit, compile, learn and it costs nothing. Not so with hardware. You really can't learn that way. Even if you had money to burn, at one point you really need to understand the science behind it all in order to not burn cubic time learning by trial and error.
Even freshly graduated EE's are not necessarily qualified to successfully approach high-speed design. It takes years of learning and dedication beyond school to really master the art. This is not a matter of software. Even if I gave you a license to $100K worth of EE design software (yes, it can get that expensive) and fully trained you on it's use you would not be prepared to design high speed boards with it.
Again, none of this is to say this is an impossible domain for non-EE's to approach. Just pointing out that it is an iceberg. What you see is what's visible above the surface.
Where to start? College Physics and Calculus. Basic Electronics. Transistors. AC, DC and RF Circuit theory. Buy kits and breadboard-based trainers and build circuits. Make lots of boards. Learn. Look at the set of courses required for an EE degree and learn as much of that as you can (and in the order they are presented). Reading books about signal integrity right now without the required foundation isn't a good idea. It's like trying to read a Chinese book on Chinese literature without having learned the Chinese language first.
Good luck.