This feels very disconnected from the realities of hardware to the point of impracticality. More energy is typically burned on RAMs/flops (storing bits and shuffling them around) than the combinational logic portion (adders/multipliers/etc) doing the arithmetic on real designs these days. Sorting, computing differences and the like involves a lot of data movement and likely temporary storage for buffering as well. I've evaluated fixed-function sorting in ASIC designs, it's not cheap at all.

This feels like the authors had some ideas of circuit design concerns from the 1980s ("hardware multipliers are very expensive!") and trying to port that to the present.