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I thought this was going to be ridiculous but it's actually a really good. It's clear enough that you could extend it down to showing how logic gates work.

The only thing missing is a little endian discussion; it assumes big endian (network byte order), and that may be confusing for all those x86 users out there.



Endianness isn't relevant to any of the stuff discussed in the article. It is equally applicable to both big endian and little endian architectures.


> that may be confusing for all those x86 users out there.

It’s pretty much every user these days - even most MIPS based network oriented devices run LE. BE lost many years ago.


The Network is big-endian (network byte order).


That's just a data serialization format, there are zillions of those. The important thing is the endianness of the CPU.


You are the one that brought up CPU architectures. Except for the now aging S390/z that will probably last in a few installations forever and the 5 people that pay to run POWER workstations the world is little endian.




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