No, actually grandparent is correct here - Skylake-X/Skylake-SP have never clocked down the first time they see an AVX-512 instruction. It actually is when the AVX instructions start to get dense enough to justify a voltage swing upwards. This actually exists in Haswell as well - certain AVX2 instructions are designated "heavy" and if you get enough of them you'll enter a voltage or frequency transition.
On Skylake-X there are more states... AVX-512 light and heavy as well.
Skylake-X on X299 can be configured to not downclock at all, the light and heavy stages are referred in BIOS as AVX2- and AVX512-offsets, but of course that comes with extra heat and power draw. The voltage transition period can't be mitigated AFAIK.
On Skylake-X there are more states... AVX-512 light and heavy as well.
https://travisdowns.github.io/blog/2020/01/17/avxfreq1.html#...
https://travisdowns.github.io/blog/2020/08/19/icl-avx512-fre...