As you mention, ARM had Thumb for ARMv7. It's important to remember that ARMv7 is still a product. The Innovator's Dilemma may blindly say to cannibalize, but instead, ARM probably thinks that these are two different sectors. The 64b sector doesn't need Thumb (which comes at an opcode space + decoder cost). The chips that ARMv8 are going into have massive DRAMs and while Thumb saves some, it wasn't enough. RISC-V on the other hand is all things to all people. So an embedded chip needs the possibility of Cray style vectors because reasons.
I do think that if someone wants an 8-wide RISC-V decoder all they have to do is throw the transistors at it. That's a consequence of fixed width. Yeah, RVC will require more transistors, but not n^2 (?) like X86 does.
RISC-V is pretty elegant, well except for the bit manipulation nonsense. They really should have plagiarized ARM instead of Intel there.
I do think that if someone wants an 8-wide RISC-V decoder all they have to do is throw the transistors at it. That's a consequence of fixed width. Yeah, RVC will require more transistors, but not n^2 (?) like X86 does.
RISC-V is pretty elegant, well except for the bit manipulation nonsense. They really should have plagiarized ARM instead of Intel there.