5nm will be Zen 4 which should bring 10-20% IPC uplift if AMD's current trend continues.
TSMC's N5 5nm transistors are 85% smaller than their N7 transistors which should lower power consumption significantly though SRAM only shrinks a modest 35% (this especially affects desktop Ryzen with tons of cache compared to their laptop versions).
AMD currently makes the Zen 2/3 IO die on Global Foundries 12nm for contractual reasons. When they finally shrink that to 7 or 5nm, the power savings should be significant.
Zen 4 is expected to bring DDR5 support which will both drastically increase bandwidth and lower RAM power consumption. Likewise, it is expected to support PCIe 5 which doubles the bandwidth per lane to a little shy of 4GB/s.
All of these things together could mean a decent improvement in IPC and total performance and a very big improvement in performance per watt.
Meanwhile, I suspect we'll start seeing large "Infinity Cache" additions to their APUs that is shared between the CPU and GPU as the bus width of DDR just doesn't offer the bandwidth to keep larger GPUs from fighting the CPU for bandwidth. This should not only improve APU total performance, but fewer trips to RAM has a significant effect on power consumption (it costs more to move 2 bytes than to add them together).
5nm will be Zen 4 which should bring 10-20% IPC uplift if AMD's current trend continues.
TSMC's N5 5nm transistors are 85% smaller than their N7 transistors which should lower power consumption significantly though SRAM only shrinks a modest 35% (this especially affects desktop Ryzen with tons of cache compared to their laptop versions).
AMD currently makes the Zen 2/3 IO die on Global Foundries 12nm for contractual reasons. When they finally shrink that to 7 or 5nm, the power savings should be significant.
Zen 4 is expected to bring DDR5 support which will both drastically increase bandwidth and lower RAM power consumption. Likewise, it is expected to support PCIe 5 which doubles the bandwidth per lane to a little shy of 4GB/s.
All of these things together could mean a decent improvement in IPC and total performance and a very big improvement in performance per watt.
Meanwhile, I suspect we'll start seeing large "Infinity Cache" additions to their APUs that is shared between the CPU and GPU as the bus width of DDR just doesn't offer the bandwidth to keep larger GPUs from fighting the CPU for bandwidth. This should not only improve APU total performance, but fewer trips to RAM has a significant effect on power consumption (it costs more to move 2 bytes than to add them together).