FWIW: The latency gains that usually benefit HFT or algorithim design, aren't, for the most part, realized using off-the-shelf tool kits.
Unfortunately, the tooling and hardware isn't currently quite at the point where HLS languages, or openCL for that matter, have had substantial impact for real-world problems, especially if you're targeting a low tier FPGA. This is especially true when implementing interfaces to PHYs or other IP.
I think part of the problem is that successful HDL design requires a fundamentally different approach to program architecture - especially when it comes to closing timing - and there's a fairly steep learning curve to getting everything set up.
I appreciate the idea of skipping verilog or low level logic introductions, but it seems to me like that's asking for substantial problems later on when you actually want to do something practical.
Then again, I can't really think of any better (ie; easier) learning pathway than what you mentioned.
It might be true that latency can't be improved much by using an off-the-shelf FPGA but performance in parallel processing tasks can. For instance an FPGA might be cheaper than a GPU (in relative performance/$) in machine learning implementations because the FPGA architecture can allow for higher throughputs/less bottlenecks.
Unfortunately, the tooling and hardware isn't currently quite at the point where HLS languages, or openCL for that matter, have had substantial impact for real-world problems, especially if you're targeting a low tier FPGA. This is especially true when implementing interfaces to PHYs or other IP.
I think part of the problem is that successful HDL design requires a fundamentally different approach to program architecture - especially when it comes to closing timing - and there's a fairly steep learning curve to getting everything set up.
I appreciate the idea of skipping verilog or low level logic introductions, but it seems to me like that's asking for substantial problems later on when you actually want to do something practical.
Then again, I can't really think of any better (ie; easier) learning pathway than what you mentioned.