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Why couldn't Intel get this working with other fabs could? Hubris, lack of talent or really bad decisions?



My understanding is that what Intel targeted for 10nm was very ambitious, so much so that it beats out what TSMC calls 7nm. In other words, other fabs haven't gotten it working yet either.

Process node names have been detached from the reality of corresponding to specific feature sizes. It's up to the companies to figure out what performance they want to label 10nm versus 7nm, and Intel's processes have generally been more aggressive than the others. What's changed is that Intel has gone from unreachably ahead to merely in the competition.


I think Intel is starting to fall behind a bit but perhaps not as much as it sounds from the headline, remember their "10 nm" process had better actual sizing numbers than what some were calling their "7 nm" process. That they failed to only come out a little ahead is a big problem for them but it's not like they failed to come out a generation behind.


From what I understand, Intel's 10nm process is roughly the same as 7nm processes from other foundries, and Intel's 14nm is more or less 10nm on someone else's scale.


I see this argument presented over and over and over again but never any supporting information to prove that claim.


Oh I can help with that, the numbers — which may not be up to date, for obvious reasons — are easy to find: https://www.semiwiki.com/forum/content/7602-semicon-west-int...

Note that there isn't a single widely accepted way to say who has the better density, but this table sums up the various metrics pretty well.


I don't know how much this is still true but traditionally Intel processes have better drive currents but more restrictive design rules than their competitors' at a given node. So I'm skeptical that their densities would equal TSMC's in practice. This isn't to deny that Intel 10nm and TSMC 7nm are roughly equivalent, just to say they make different trade offs in a way that chart doesn't cover.


Density is not really an important metric to end users though. What matters is power consumption and achievable clock speeds but these are very difficult to directly compare between processes unless someone has made the same design on both (as has happened with several phone SoCs dual sourcing from TSMC/Samsung).


Density is important for the fab. Power consumption and clock speeds are something that can be tuned per design even for the same process.


Well yes obviously it's important to the fab. Higher density allows them to fit more dies on a wafer, sell for slightly higher margins, whatever. Great for Intel but again absolutely zero reason for end users to care. Pricing is basically completely divorced from the manufacturing costs anyway.

When someone says something like "Intel's 14nm is as good as TSMC's 10nm" I think most people would expect this to be talking about the performance of the chips being produced.


> When someone says something like "Intel's 14nm is as good as TSMC's 10nm" I think most people would expect this to be talking about the performance of the chips being produced.

One could reasonably assume that when discussion this on a consumer oriented forum or publication.

But this is an article (for an author with a spotty record at best) about the state of the industry, not about whether or not you'll be able to clock your CPU a few MHz higher.


Density is critically important, because density is directly related to cost, same performance chip in half the size is half the cost to produce.


https://www.semiwiki.com/forum/content/7602-semicon-west-int... See the table "7nm comparison"

https://www.semiwiki.com/forum/content/7544-7nm-5nm-3nm-logi...

And: https://wccftech.com/analysis-about-intels-10nm-process/

tl;dr: Intel 10nm gets 106.1M transistors per mm^2. TSMC 7FF gets 96.49. Intel 10nm has an HD SRAM cell size of 0.0312 micrometers. TSMC 7LP is 0.0270.

Intel gets a few more transistors per area, TSMC gets more SRAM per area, but on balance, they're pretty similar. From the second article:

"From figure 3 the 4 processes have similar overall process density. GF has the smallest CPP x M2P x Tracks, Intel has the highest MTx/mm2 value and Samsung has the smallest SRAM cell size. The size of a design in each of these processes will therefore be design dependent and I would not judge any of the four processes to be significantly denser than the others. In terms of relative performance, we have no way to judge that currently."

[Note: Updated this post to quote the TSMC numbers instead of the GF numbers, since TSMC is shipping and GF has pulled the plug on 7nm]


It seems as though nm has stopped being a useful unit of measurement in this domain, and we should switch to something else--or several somethings else.


Does SRAM size here have a practical effect on cache speed? Or is it mostly just down to real estate budget?


The numbers here are just real estate - speed is going to be a big "it depends" that can't really be predicted just from area.

(in general, cache speed is more affected by size, and that's an architectural decision -- see, for example, Intel's move to a 1MB L2 in Skylake-X instead of a 256KB L2 (11 cycles -> 13 cycles, but Intel did a lot of work to try to speed up the cache to reduce the pain)).


The graph in TFA does show Intel's 14nm as having better density than competing 14nm nodes, though the lead seems to be less than a full process node.


It seems kind of like how incorrect news about science becomes “common knowledge”. This person probably saw someone else post this, and now they’re just parroting it back. That other person, they might have had it from a news article. Or maybe they were just parroting another comment in turn. Even if it was from the news, was that news sources from a sophisticated engineering perspective, or a bit of marketing fluff? Hard to know. Not saying whether this is correct or incorrect either, just making a comment about the sources of knowledge in general in the age of internet comments.

But it would be pretty quiet on here if people only talked about what they actually know.


This is a classic ad hominem argument.

There was a claim made, someone asked for evidence, and then a third person provided the evidence. Done. This is a good way for discussions to work. What would really kill the discussion is if people stopped and gathered evidence first, and compiled it into every comment they made. I trust people are skeptical enough not to believe garbage, and if they’re curious they can ask questions or do additional research themselves.


Other fabs couldn't either. Intel 10nm depended highly on EUV, the only working 7nm (TSMC) doesn't use EUV at all yet. The first EUV fab will be much better than any existing one today, and it still seems like Intel will claim that prize.

Though, tsmc certainly isn't letting them have it for free.



Neither, most probably a side effect of starting before the others, when research wasn't finished, so they dug themselves into a problem too deep to be commercially viable while other were growing on smaller parts of the market. Now that EUV is polished and stable, competition can just jump on the bandwagon while intel has to kill its old pipeline.




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