>"Google has its Tensor Processing Unit (TPU), with one core per chip and software-controlled memory instead of caches"
Is have heard of software-controlled caches before but I am imagining this is not the same thing? Could someone say? Might anyone have any decent resources on software-controlled memory architectures?
>"Google has its Tensor Processing Unit (TPU), with one core per chip and software-controlled memory instead of caches"
Is have heard of software-controlled caches before but I am imagining this is not the same thing? Could someone say? Might anyone have any decent resources on software-controlled memory architectures?