I have managed to rummage around and found the article. It was actually in IEEE Micro May 1982, "A Unique Microprocessor Instruction Set" Dennis A Fairclough.
The article looked at the statistical usage of instructions and placed them into 8 broad groups, Data Movement, Program Modifying, Arithmetic, Compare, Logical, Shift, Bit and I/O & Misc groups.
The result of the analysis was as follows:
For groups data movement and Program Modifying, 1 Instruction - MOVE [Cummulative usage 75%]
For group Arithmetic, 4 Instructions - ADD, SUB, MULT, DIV [Cumulative usage 87.5%]
For group Compare, 1 previous Instruction - SUB [Cumulative usage 93.75%]
For group Logical, 3 Instructions - AND, OR, XOR [Cumulative usage 96.88%]
For group Shift, 1 Instruction - SHIFT [Cumulative usage 98.44%]
For group Bit, 1 Instruction - MOVEB [Cumulative usage 99.22%]
For group I/O & Misc, depends on whether i/o is memory mapped or otherwise, so either 0 or 1 Instruction.
Some possible extended instructions included INC, DEC, I/DBRC and MOVEM.
The address fields (and in some cases additional flags) determine source and destination, etc.
So, in relation to the VLIW question, the instruction length is determined more by the addressing modes allowed than by the specific instruction itself (which is encoded in say 4 bits).
The article looked at the statistical usage of instructions and placed them into 8 broad groups, Data Movement, Program Modifying, Arithmetic, Compare, Logical, Shift, Bit and I/O & Misc groups.
The result of the analysis was as follows:
For groups data movement and Program Modifying, 1 Instruction - MOVE [Cummulative usage 75%]
For group Arithmetic, 4 Instructions - ADD, SUB, MULT, DIV [Cumulative usage 87.5%]
For group Compare, 1 previous Instruction - SUB [Cumulative usage 93.75%]
For group Logical, 3 Instructions - AND, OR, XOR [Cumulative usage 96.88%]
For group Shift, 1 Instruction - SHIFT [Cumulative usage 98.44%]
For group Bit, 1 Instruction - MOVEB [Cumulative usage 99.22%]
For group I/O & Misc, depends on whether i/o is memory mapped or otherwise, so either 0 or 1 Instruction.
Some possible extended instructions included INC, DEC, I/DBRC and MOVEM.
The address fields (and in some cases additional flags) determine source and destination, etc.
So, in relation to the VLIW question, the instruction length is determined more by the addressing modes allowed than by the specific instruction itself (which is encoded in say 4 bits).