Testing also included very expensive (SW license cost, now HW), cycle accurate simulators at Delphi. ASIC specs were implemented into C and hooked into the simulator. Prototype firmware was compiled and run on the CPU simulator and "board" (netlist of simulated ASICs). This helped discover bugs/spec deficiencies before ASIC tape-out (save $$$). Of course, it was all wrapped in a Tk "dashboard/test unit" GUI for the other teams to consume. Tk was actually quite a pleasure to use, especially when interfacing with C!

EDIT: It basically provided at least two implementations for an ASIC by independent teams. The ASIC guys would implement the real deal in an HDL and test it. However, full system tests where the HDL simulation is hooked up with CPU simulation were too slow. By implementing the same spec in C, you gain simulation performance and get a second implementation and set of eyes that can help find bugs.